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Peter Pessl

Security Architect

Infineon Technologies

Biography

I am a Security Architect at Infineon Technologies, Munich. Before that, I was a PhD student and Postdoc in the Secure Systems group at the Institute of Applied Information Processing and Communications at Graz University of Technology . There, I performed research on implementation attacks (side channels and faults) and respective countermeasures for cryptographic primitives. In particular, I focused on implementation security of lattice-based cryptography and other quantum-secure schemes.

Interests

  • Implementation Security
  • Post-Quantum Cryptography
  • Efficient Implementations

Education

  • PhD in Computer Science, 2018

    Graz University of Technology

  • MSc in Information and Computer Engineering, 2014

    Graz University of Technology

  • BSc in Information and Computer Engineering, 2011

    Graz University of Technology

Publications

Correction Fault Attacks on Randomized CRYSTALS-Dilithium. IACR TCHES 2024.

PDF Source

Belief Propagation Meets Lattice Reduction: Security Estimates for Error-Tolerant Key Recovery from Decryption Errors. IACR TCHES 2023.

PDF Source

Higher-Order Masked Ciphertext Comparison for Lattice-Based Cryptography. IACR TCHES 2022.

PDF Source

Fault-Enabled Chosen-Ciphertext Attacks on Kyber. INDOCRYPT 2021.

PDF Video Source

Fault Attacks on CCA-secure Lattice KEMs. IACR TCHES 2021.

PDF Slides Video Source

Single-Trace Attacks on Keccak. IACR TCHES 2020.

PDF Slides Video Source

More Practical Single-Trace Attacks on the Number Theoretic Transform. LATINCRYPT 2019.

PDF Slides

Differential Fault Attacks on Deterministic Lattice Signatures. IACR TCHES 2018.

PDF Slides Video

Single-Trace Side-Channel Attacks on Masked Lattice-Based Encryption. CHES 2017.

PDF Slides Video

To BLISS-B or not to be: Attacking strongSwan's Implementation of Post-Quantum Signatures. ACM CCS 2017.

PDF Slides Video

Analyzing the Shuffling Side-Channel Countermeasure for Lattice-Based Signatures. INDOCRYPT 2016.

PDF Slides

DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks. USENIX Security Symposium 2016.

PDF Slides Video Teaser Video

Enhancing Side-Channel Analysis of Binary-Field Multiplication with Bit Reliability. CT-RSA 2016.

PDF Slides

Curved Tags - A Low-Resource ECDSA Implementation Tailored for RFID. RFIDSec 2014.

PDF

Pushing the Limits of SHA-3 Hardware Implementations to Fit on RFID. CHES 2013.

PDF Slides

Teaching

At Graz University of Technology, I taught the following courses.

  • Introduction to Information Security (practicals 2015 , 2016 , 2017 , 2018 )
    Undergraduate course, programming exercises teaching the basics of information security.

  • Information Security (practicals 2019 )
    Undergraduate course, programming exercises teaching the basics of information security.

  • Embedded Security (lecture and practicals 2017 , 2018 )
    Graduate course on physical implementation attacks (power analysis, fault attacks) and countermeasures.

I also supervised several master and bachelor theses on side-channel attacks and efficient implementations of cryptography.

Besides, I held tutorials on side-channel attacks at the Graz Security Week (2017, 2018, 2019).

Service

Program Committee

External Reviewer

Subreviewer for many other conferences and journals, such as ACNS, ASIACRYPT, CARDIS, CHES, CRYPTO, COSADE, CT-RSA, DATE, JCEN, PQCRYPTO, SAC

Awards

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